103#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
104#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
105#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
106
107// CONFIG4L
108#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
109#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
110#pragma config BBSIZ = 1024 // Boot Block Size Select bit (1K words (2K bytes) boot block)
111#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
112
113// CONFIG5L
114#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
115#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
116#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
117#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
118
119// CONFIG5H
120#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
121#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
122
123// CONFIG6L
124#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
125#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
126#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
127#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
128
129// CONFIG6H
130#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
131#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
132#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
133
134// CONFIG7L
135#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
136#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
137#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
138#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
139
140// CONFIG7H
141#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)