PIC18 LaurTec Library
3.1.2
Open Source C Library for PIC18 Microcontrollers based on C18 - XC8 Compilers
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PIC18F4550_config.h
Go to the documentation of this file.
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/*******************************************************************************
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Author : Mauro Laurenti
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Version : 1.0
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Created on Date : 02/02/2013
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Last update : 29/09/2013
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CopyRight 2006-2013 all rights are reserved
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********************************************************
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SOFTWARE LICENSE AGREEMENT
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********************************************************
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The usage of the supplied software imply the acceptance of the following license.
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The software supplied herewith by Mauro Laurenti (the Author)
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is intended for use solely and exclusively on Microchip PIC Microcontroller (registered mark).
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The software is owned by the Author, and is protected under applicable copyright laws.
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All rights are reserved.
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Any use in violation of the foregoing restrictions may subject the
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user to criminal sanctions under applicable laws (Italian or International ones), as well as to
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civil liability for the breach of the terms and conditions of this license.
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Commercial use is forbidden without a written acknowledgment with the Author.
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Personal or educational use is allowed if the application containing the following
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software doesn't aim to commercial use or monetary earning of any kind.
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THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES,
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WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
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TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE AUTHOR SHALL NOT,
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IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR
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CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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********************************************************
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PURPOSES
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********************************************************
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This file contains all the configuration words needed for the PIC18F4550.
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It can be easily adapted to other PICs according to the available configurations.
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****** WARNING ******
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The configurations must be changed to reflect the application needs!
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//*****************************************************************************/
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#ifndef PIC18F4550_CONFIG_H
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#define PIC18F4550_CONFIG_H
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#ifdef __XC8
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#include <xc.h>
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#endif
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//******************************************************************************
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// Register: CONFIG1L @ 0x300000
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//******************************************************************************
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// System Clock Postscaler Selection bits
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//OSC2_PLL3 [Primary Oscillator Src: /2][96 MHz PLL Src: /3]
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//OSC4_PLL6 [Primary Oscillator Src: /4][96 MHz PLL Src: /6]
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//OSC3_PLL4 [Primary Oscillator Src: /3][96 MHz PLL Src: /4]
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//OSC1_PLL2 [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
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#pragma config CPUDIV = OSC1_PLL2
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//PLL Prescaler Selection bits
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//1 No prescale (4 MHz oscillator input drives PLL directly)
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//5 Divide by 5 (20 MHz oscillator input)
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//12 Divide by 12 (48 MHz oscillator input)
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//2 Divide by 2 (8 MHz oscillator input)
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//6 Divide by 6 (24 MHz oscillator input)
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//3 Divide by 3 (12 MHz oscillator input)
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//10 Divide by 10 (40 MHz oscillator input)
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//4 Divide by 4 (16 MHz oscillator input)
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#pragma config PLLDIV = 1
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//USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)
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//1 USB clock source comes directly from the primary oscillator block with no postscale
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//2 USB clock source comes from the 96 MHz PLL divided by 2
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#pragma config USBDIV = 2
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//******************************************************************************
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// Register: CONFIG1H @ 0x300001
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//******************************************************************************
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//Internal/External Oscillator Switchover bit
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//OFF Oscillator Switchover mode disabled
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//ON Oscillator Switchover mode enabled
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#pragma config IESO = OFF
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//Oscillator Selection bits
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//INTOSC_EC Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)
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//ECPLLIO_EC EC oscillator, PLL enabled, port function on RA6 (ECPIO)
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//XT_XT XT oscillator (XT)
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//INTOSC_HS Internal oscillator, HS oscillator used by USB (INTHS)
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//ECPLL_EC EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)
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//INTOSC_XT Internal oscillator, XT used by USB (INTXT)
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//EC_EC EC oscillator, CLKO function on RA6 (EC)
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//ECIO_EC EC oscillator, port function on RA6 (ECIO)
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//XTPLL_XT XT oscillator, PLL enabled (XTPLL)
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//HSPLL_HS HS oscillator, PLL enabled (HSPLL)
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//HS HS oscillator (HS)
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//INTOSCIO_EC Internal oscillator, port function on RA6, EC used by USB (INTIO)
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#pragma config FOSC = HS
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//Fail-Safe Clock Monitor Enable bit
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//OFF Fail-Safe Clock Monitor disabled
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//ON Fail-Safe Clock Monitor enabled
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#pragma config FCMEN = OFF
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//******************************************************************************
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// Register: CONFIG2L @ 0x300002
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//******************************************************************************
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//OFF USB voltage regulator disabled
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//ON USB voltage regulator enabled
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#pragma config VREGEN = OFF
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//Brown-out Reset Enable bits
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//SOFT Brown-out Reset enabled and controlled by software (SBOREN is enabled)
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//OFF Brown-out Reset disabled in hardware and software
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//ON Brown-out Reset enabled in hardware only (SBOREN is disabled)
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//ON_ACTIVE Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)
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#pragma config BOR = OFF
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//Brown-out Reset Voltage bits
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//1
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//2
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//3 Minimum setting
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//0 Maximum setting
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#pragma config BORV = 0
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//Power-up Timer Enable bit
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//OFF PWRT disabled
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//ON PWRT enabled
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#pragma config PWRT = ON
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//******************************************************************************
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// Register: CCONFIG2H @ 0x300003
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//******************************************************************************
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//Watchdog Timer Postscale Select bits
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//8 1:8
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//1 1:1
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//32768 1:32768
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//1024 1:1024
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//2 1:2
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//32 1:32
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//16 1:16
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//16384 1:16384
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//128 1:128
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//4096 1:4096
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//64 1:64
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//8192 1:8192
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//2048 1:2048
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//512 1:512
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//256 1:256
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//4 1:4
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#pragma config WDTPS = 1
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//Watchdog Timer Enable bit
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//OFF WDT disabled (control is placed on the SWDTEN bit)
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//ON WDT enabled
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#pragma config WDT = OFF
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//******************************************************************************
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// Register: CONFIG3H @ 0x300005
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//******************************************************************************
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//CCP2 MUX bit
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//OFF CCP2 input/output is multiplexed with RB3
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//ON CCP2 input/output is multiplexed with RC1
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#pragma config CCP2MX = OFF
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//PORTB A/D Enable bit
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//OFF PORTB<4:0> pins are configured as digital I/O on Reset
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//ON PORTB<4:0> pins are configured as analog input channels on Reset
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#pragma config PBADEN = OFF
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//Low-Power Timer 1 Oscillator Enable bit
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//OFF Timer1 configured for higher power operation
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//ON Timer1 configured for low-power operation
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#pragma config LPT1OSC = OFF
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//MCLR Pin Enable bit
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//OFF RE3 input pin enabled; MCLR pin disabled
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//ON MCLR pin enabled; RE3 input pin disabled
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#pragma config MCLRE = ON
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//******************************************************************************
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// Register: CONFIG4L @ 0x300006
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//******************************************************************************
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//Background Debugger Enable bit
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//OFF Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
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//ON Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
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#pragma config DEBUG = OFF
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//Stack Full/Underflow Reset Enable bit
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//OFF Stack full/underflow will not cause Reset
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//ON Stack full/underflow will cause Reset
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#pragma config STVREN = ON
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//Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit
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//OFF ICPORT disabled
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//ON ICPORT enabled
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#pragma config ICPRT = OFF
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//Extended Instruction Set Enable bit
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//OFF Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
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//ON Instruction set extension and Indexed Addressing mode enabled
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#pragma config XINST = OFF
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//Single-Supply ICSP Enable bit
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//OFF Single-Supply ICSP disabled
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//ON Single-Supply ICSP enabled
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#pragma config LVP = OFF
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//******************************************************************************
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// Register: CONFIG5L @ 0x300008
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//******************************************************************************
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//Code Protection bit
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//OFF Block 0 (000800-001FFFh) is not code-protected
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//ON Block 0 (000800-001FFFh) is code-protected
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#pragma config CP0 = OFF
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//Code Protection bit
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//OFF Block 1 (002000-003FFFh) is not code-protected
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//ON Block 1 (002000-003FFFh) is code-protected
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#pragma config CP1 = OFF
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//Code Protection bit
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//OFF Block 2 (004000-005FFFh) is not code-protected
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//ON Block 2 (004000-005FFFh) is code-protected
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#pragma config CP2 = OFF
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//Code Protection bit
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//OFF Block 3 (006000-007FFFh) is not code-protected
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//ON Block 3 (006000-007FFFh) is code-protected
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#pragma config CP3 = OFF
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//******************************************************************************
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// Register: CONFIG5H @ 0x300009
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//******************************************************************************
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//Data EEPROM Code Protection bit
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//OFF Data EEPROM is not code-protected
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//ON Data EEPROM is code-protected
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#pragma config CPD = OFF
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//Boot Block Code Protection bit
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//OFF Boot block (000000-0007FFh) is not code-protected
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//ON Boot block (000000-0007FFh) is code-protected
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#pragma config CPB = OFF
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//******************************************************************************
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// Register: CONFIG6L @ 0x30000A
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//******************************************************************************
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//Write Protection bit
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//OFF Block 0 (000800-001FFFh) is not write-protected
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//ON Block 0 (000800-001FFFh) is write-protected
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#pragma config WRT0 = OFF
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//Write Protection bit
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//OFF Block 1 (002000-003FFFh) is not write-protected
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//ON Block 1 (002000-003FFFh) is write-protected
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#pragma config WRT1 = OFF
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//Write Protection bit
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//OFF Block 2 (004000-005FFFh) is not write-protected
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//ON Block 2 (004000-005FFFh) is write-protected
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#pragma config WRT2 = OFF
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//Write Protection bit
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//OFF Block 3 (006000-007FFFh) is not write-protected
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//ON Block 3 (006000-007FFFh) is write-protected
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#pragma config WRT3 = OFF
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//******************************************************************************
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// Register: CONFIG6H @ 0x30000B
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//******************************************************************************
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//Boot Block Write Protection bit
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//OFF Boot block (000000-0007FFh) is not write-protected
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//ON Boot block (000000-0007FFh) is write-protected
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#pragma config WRTB = OFF
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//Configuration Register Write Protection bit
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//OFF Configuration registers (300000-3000FFh) are not write-protected
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//ON Configuration registers (300000-3000FFh) are write-protected
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#pragma config WRTC = OFF
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//Data EEPROM Write Protection bit
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//OFF Data EEPROM is not write-protected
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//ON Data EEPROM is write-protected
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#pragma config WRTD = OFF
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//******************************************************************************
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// Register: CONFIG7L @ 0x30000C
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//******************************************************************************
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//Table Read Protection bit
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//OFF Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks
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//ON Block 0 (000800-001FFFh) is protected from table reads executed in other blocks
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#pragma config EBTR0 = OFF
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//Table Read Protection bit
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//OFF Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks
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//ON Block 1 (002000-003FFFh) is protected from table reads executed in other blocks
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#pragma config EBTR1 = OFF
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//Table Read Protection bit
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//OFF Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks
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//ON Block 2 (004000-005FFFh) is protected from table reads executed in other blocks
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#pragma config EBTR2 = OFF
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//Table Read Protection bit
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//OFF Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks
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//ON Block 3 (006000-007FFFh) is protected from table reads executed in other blocks
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#pragma config EBTR3 = OFF
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//******************************************************************************
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// Register: CONFIG7H @ 0x30000D
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//******************************************************************************
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//Boot Block Table Read Protection bit
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//OFF Boot block (000000-0007FFh) is not protected from table reads executed in other blocks
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//ON Boot block (000000-0007FFh) is protected from table reads executed in other blocks
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#pragma config EBTRB = OFF
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#endif
LaurTec_PIC_libraries_v_3.1.2
conf
PIC18F4550_config.h
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